International Journal of Innovative Trends in Engineering
Approved By International Serial Standard(ISSN), National Science Library(NSL) and National Institute of Science Communication and Information Resources(NISCAIR)
ISSN: 2395-2946 (Online)

News Updates: IJITE October 2017 Volume 34 Edition Published Sucessfully.                Call for Papers: IJITE Inviting Research Papers For Volume 35 (November 2017) Edition.

IJITE - Issue 47, Volume 28, Number 03

Published On : April 2017
SNo. Paper Title & Authors Page Download
21
Self-Compacting Concrete
Kuldeep Gaurav, Aditya Kumar Gautam, Amresh Kumar, Rajeev Kumar Saroj, Suraj Kumar Vimal, Santosh Kumar
Abstract: Self compacting concrete is that concrete which areable to flow and fill each and every part and corner of formwork, even in the presence of dense reinforcement, purely by means of its own self weight and without the need for any vibration or any other type of compaction. Its development must ensure a good balance between deformability and stability. The compatibility of SCC is affected by the characteristics of materials and mix proportion so it becomes necessary to evolve a procedure for mix design of SCC. The paper presents on experimental procedure for design of self compacting concrete mix with different ratios of Fly Ash, Coarse Aggregate and Fine Aggregate using Cement OPC-43 grade, Potable Water, Super plasticizer& Silica fume. The test result acceptance characteristics of self-compacting concrete such as slump flow; V-funnel and L-box are presented. Further compressive strength at the ages of 7, 28, and 90 days and result are included here.
Keywords: Self-compacting concrete; Fly ash; Super plasticizer; viscosity modifying agent; mix design; compressive strength, split tensile strength, flexural strength.
105-108
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22
A Novel Ultra Wideband Microstrip Antenna for 2.8 to 14.2 GHz Applications
Shikha Sharma, Sudesh Gupta, Pratibhadevi Umesh
Abstract: In this research, a compact size (UWB) Ultra wideband fractal microstrip antenna is designed and simulated for wider bandwidth applications ranging from 2.8 to 14.2 GHz. The proposed work introduces a methodology that adding of structures increases the bandwidth and minimizes the return loss. Сommuniсation systems require small size, Ultra wideband antennas. Fraсtal geometries have been used to fabriсate ultra broad-band antennas. In addition, fraсtal geometries сan be reduсing the size of antennas. In this work, we have investigated a new fraсtal antenna with ultra broad-band properties. The proposed design is a loaded the 3 iteration of a new fraсtal geometry to a monopole СPW fed ultra wideband miсrostrip patсh antenna. The simulation is performed via HFSS eleсtromagnetiс simulator software. The simulation proves that the proposed antenna is appliсable in 2.8- 14.2 GHz frequenсy range.
Keywords: СPW fed Miсrostrip Antenna, UWB Antenna, UWB Antenna Designing, and Сompaсt Antenna, UWB.
109-111
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23
A Review on a Novel Delay & Quantum Cost Efficient Reversible Realization of RAM
Ankita Tiwari, Prof. Tarun Verma
Abstract: Programmable reversible logic is emerging as a prospective design style for Arithmetic operations lie at the foundation of modern nanotechnology and quantum computing. Improvements to arithmetic circuits can result in improvements to the entire computing system. Recent advances in reversible logic using and quantum computer algorithms allow for improved computer architecture and arithmetic logic unit designs. A garbage-free reversible computing system it is especially important that the arithmetic circuits are also garbage-free, but how to do this is not always obvious, and history shows that rethinking our current knowledge can be necessary. There are three basic 2x2 reversible logic gates. The Controlled-Not gate - commonly called the Feynman gate - is designed to produce the following output states: P = A and Q = A⊕B. Since fanout is expressively forbidden in reversible logic, since a fanout has one input and two outputs, the Feynman gate may be used to duplicate a signal when B is equal to 0. Gates utilize the unitary operators to produce reversible logic calculations when a select line is set at ‘1’. in these work an extensive study and analysis of the reversible logic has reviewed.
Keywords: Arithmetic operations, Reversible logics, Quantum Cost Efficient, Reversible logic gates.
112-116
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24
An Extensive Review on MIMO System Using V-BLAST Detection Technique
Chandan Kumar, Prof. Anil Khanedelwal
Abstract: Wireless correspondence utilizing Multiple Input Multiple Output (MIMO) systems builds productivity for a given aggregate transmits power. Here explore a novel way to deal with perform interpreting request advancement in the vertical Bell Labs layered space-time (V-BLAST) arranging. Taking into consideration immediate transmission of various, autonomously encoded information streams, the V-BLAST transmit-get technique applies to the uplink of a multi-client correspondence system. A multi-reception apparatus collector disentangles information streams successively, exchange with between stream impedance by method for wiping out and nulling; obstruction from before decoded streams is crossed out by subtraction, and lingering impedance is nulled by straight balance. The request in which the streams are decoded can visibly affect system presentation. Numerous Input Multiple Output (MIMO) channels can offer high ability to Wireless systems and the limit increments directly with the quantity of reception apparatuses. There are numerous plans that can be connected to MIMO systems, for example, space time piece codes, space time trellis codes, and the Vertical Bell Labs Space-Time basic configuration (V-BLAST). We consider the expansive range MIMO system, the general V-BLAST structure, and the Successive Interference Cancelation (SIC) Zero-Forcing (ZF) identifiers in this paper.
Keywords: Communication systems, V-BLAST, ZF, successive interference cancellation, decision feedback equalizers, fading channels.
117-121
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25
A Review: Pre-Encoded Multipliers Based on Non-Redundant Radix-4 Encoding
Saumya Sharma, Bharti Gupta
Abstract: With the increasing popularity of electronic applications, modular multiplication is becoming one of the important procedures in many computer applications. Because of its computational intensity, implementation in dedicated hardware is required for high-performance systems. Various techniques for speeding up modular multiplication have been reported in literature the basic operation of the modular arithmetic is modular multiplication, which is utilized in many of the computer algorithms and its applications. Thus there is a vital need to develop an efficient algorithms and highspeed hardware to carry out this multiplication.Many algorithms have been proposed for implementing efficient modular multiplication.The radix-4 modular multiplier can be used to implement fast computer applications, e.g RSA cryptosystem and to reduce the number of iterations and pipelining. In this research different various methodologies and algorithm has discussed.The performance of these algorithms is primarily determined by the efficient implementation of the modular multiplication and exponentiation.Discussed a Booth's Radix-2 multiplier and estimated its delay, area and power. A comparison analysis of Radix-2 and Radix-4 algorithm as it seems more suitable for the design by using different adder architectures like RCA and CLA.
Keywords: Multiplying circuits, Modified Booth encoding, Pre-Encoded multipliers, VLSI implementation, FPGA, LUTs.
122-127
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26
Efficient Coding Schemes for Fault-Tolerant Parallel Filters: A Survey
Kavita Goswami, Prof. Kamna Mishra
Abstract: As the complexity of communications and signal processing systems increases, so does the number of blocks or elements that they have. In many cases, some of those elements operate in parallel, performing the same processing on different signals. A typical example of those elements is digital filters. The increase in complexity also poses reliability challenges and creates the need for fault-tolerant implementations. A review on scheme based on error correction coding has been presented to protect parallel filters. In that scheme, each filter is treated as a bit, and redundant filters that act as parity check bits are introduced to detect and correct errors. In this brief, the idea of applying coding techniques to protect parallel filters is addressed in a more general way. In particular, it is shown that the fact that filter inputs and outputs are not bits but numbers enables a more efficient protection. This reduces the protection overhead and makes the number of redundant filters independent of the number of parallel filters. The present literature review is described. Finally, both the effectiveness in protecting against errors and the cost are evaluated for a field-programmable gate array implementation in prior work.
Keywords: Coding, parallel filters, soft errors.
128-132
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27
Hover Board Cart
Boney Augustine, Love Dubey, Harsh Sahu, Hemant Sahu, Aditya Jaiswal, Ashish Kumar Chaturvedi
Abstract: Our goal is to reduce pollution from cars and gasoline and make transportation more fun. We plan to do this by making all new means of travel. This invention will reduce the amount of cars sold and the amount of gasoline used and put into the air. So we planned to make hover board cart. Hoverboard Cart is a hybrid vehicle which runs using the power of motors which are connected to each wheel of the hover board. Motors are getting power from the battery used in the hover board. An Electric DC motor is a machine which converts electric energy into mechanical energy. The working of DC motor is based on the principle that when a current-carrying conductor is placed in a magnetic field, it experiences a mechanical force. The Electric motors give the necessary torque to the wheels and then it is controlled with the help of switches. As the whole idea of hover board cart is based on the people related to disabilities, the switches used at the hand positions so that anyone can able to navigate the vehicle easily.
Keywords: Hover board Cart.
133-136
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28
Treadmill Bicycle
Aman Kumar Vaishy, Amit Gour, Bhupendra Soni, Gaurav Dixit, Harsh Khandelwal, Harsh Rai, Himanshu Khairnar, A. H. Khan, Ashish Chaturvedi
Abstract: Treadmill bicycle is a totally new concept of moving. The gear ratio is boosting your walking pace up to the speed of the regular bike. When you are walking on the treadmill bicycle, you push the treadmill backward with your feet. The movement of the treadmill will drive the sun gear fitted on the treadmill roller which will further drive the mechanism. The bicycle has balanced base.
Keywords: Gear ratio, Gear mechanism, Treadmill, Fork Assembly.
137-139
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